Introduction

The rapid scaling of AI workloads has pushed traditional data center infrastructure to its physical and operational limits. As massive clusters of graphics processing units are harnessed to train large language models, the underlying network has transformed from a utility into a primary computational bottleneck. A lot has changed in the competitive landscape of AI networking since we evaluated Ethernet and InfiniBand technologies in 2024. The competitive landscape for inter-GPU connectivity comprises established titans and agile startups, revealing the strategic gaps being exploited and the technological wedges being driven into the market.

The Take

The AI networking sector is experiencing an existential architectural schism between vertical integration and open disaggregation. While legacy vendors — most notably NVIDIA Corp. — seek to lock customers into proprietary, high-margin full-stack ecosystems, a rising cohort of startups is leveraging open standards like SONiC, microservices-based software and merchant silicon to commoditize AI hardware. The battle is no longer just about raw bandwidth; it is about operational simplicity, memory sharing, power efficiency and escaping vendor lock-in.

Context

Enterprise AI workloads are uniquely demanding, and enterprises are deploying them on-premises almost as often as they are using the cloud (Figure 1). Unlike standard cloud applications that tolerate minor packet drops and retransmissions, distributed AI training requires an entirely "lossless" network fabric between graphics processing unit (GPU) nodes. A single delayed or dropped packet can stall a fleet of highly expensive GPUs, blowing out job completion times and increasing training and inference costs. Historically, InfiniBand was the default choice to guarantee lossless performance. Today, the industry is transitioning to high-speed, lossless Ethernet fabrics optimized to scale these massive clusters.

Figure 1: Enterprises are placing AI workloads everywhere, including on-premises

Incumbent strategy

The dominant incumbents are protecting their market share with distinct, high-margin architectural strategies. NVIDIA leads this cohort with a vertically integrated approach, combining high-capacity switching with server-side BlueField-3 Data Processing Units (DPUs). This tight hardware-to-software coupling allows NVIDIA to perform dynamic packet spraying, actively routing data across multiple network paths and reassembling it at the destination DPU to eliminate congestion. This offers customers confidence that the AI system as a whole will work as expected, but binds the customer to NVIDIA's ecosystem.

Arista Networks Inc. champions the open, scale-across networking model. Leveraging Broadcom Inc.'s high-density merchant silicon and acclaimed Extensible Operating System (EOS), Arista targets hyperscalers seeking predictable, high-performance Ethernet switching. Cisco Systems Inc. and Hewlett Packard Enterprise Co. focus on enterprise risk mitigation. Cisco packages NVIDIA's raw horsepower into its Secure AI Factory, providing enterprises with pre-integrated, familiar deployment options. HPE leverages its acquisition of Juniper Networks to deliver a comprehensive, single-vendor hardware bundle that combines servers, storage and Juniper's switching fabrics under one operational roof.

Startup strategy

Startups are targeting critical operational vulnerabilities left behind by these massive players, focusing heavily on software complexity, open-source orchestration and physical hardware bottlenecks. While open-source SONiC has emerged as the preferred operating system for open networking systems, configuring it for AI congestion protocols remains difficult for ordinary enterprise IT teams.

Hedgehog and Aviz Networks are exploiting this software complexity gap. Hedgehog serves as a Kubernetes-native network controller, enabling IT teams to manage physical SONiC switches with the same DevOps tools they use for containerized software. Aviz Networks provides its multi-vendor Network Copilot, a private generative AI assistant that automates real-time troubleshooting across heterogeneous SONiC environments and agentic integration supporting modern DevOps processes.

Arrcus and DriveNets offer SONiC alternatives for service providers, hyperscalers and large-scale cloud builders, delivering highly specialized, flexible options to legacy software stacks. Arrcus offers its microservices-based ArcOS and its ACE-AI (Arrcus Connected Edge for AI) framework, providing deep predictive telemetry and RoCEv2 optimization that integrates natively with server DPUs. DriveNets leverages a Distributed Disaggregated Chassis (DDC) design built on Broadcom merchant silicon to evenly distribute data across all network paths via a scheduled, cell-based fabric. By handling traffic intelligently at the edge and eliminating unscheduled congestion, DriveNets matches the reliability of InfiniBand at standard Ethernet cost.

At the physical hardware layer, scaling networks to 800 Gbps and 1.6 terabits per second pushes copper wiring and traditional pluggable transceivers past their power and thermal limits. Hardware startups are driving physical wedges directly into this bottleneck. Enfabrica is tackling server-level memory congestion by converging high-speed networking and PCIe/CXL memory interfaces onto a single silicon chip (Accelerated Compute Fabric [ACF]), enabling GPUs to share memory pools across servers without passing through traditional, expensive top-of-rack switches. Meanwhile, Micas Networks focuses on the physical manufacturing yield of co-packaged optics, bringing Tomahawk 6-based platforms to market months ahead of larger, slower-moving rivals.

Finally, in the silicon and co-packaged optical domain, Ayar Labs and Marvell, from its acquisition of Celestial AI in 2025, are tackling the physical limitations of electrical networking. Ayar Labs is pioneering optical chiplets that replace electrical I/O on the processor substrate with light, dramatically improving bandwidth-per-watt efficiency. Celestial AI focuses on disaggregated memory-to-processor architectures, using light-based interconnects to bypass the "memory wall" that typically limits distributed training clusters.

The table below outlines how these disruptive startups compare with established giants across the networking stack.

Figure 2: Competitive landscape comparison

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